THREE DIMENSIONAL INTEGRATED CIRCUIT

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United States of America Patent

SERIAL NO

15618048

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Abstract

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A method comprises providing a first substrate having dielectric structures and conductive structures. Ions are implanted into the first substrate, the ions traveling through the dielectric structures and the conductive structures to define a cleave plane in the first substrate. The first substrate is cleaved at the cleave plane to obtain a cleaved layer having the dielectric structure and the conductive structures. The cleaved layer is used to form a three-dimensional integrated circuit device having a plurality of stacked integrated circuit (IC) layers, the cleaved layer being one of the stacked IC layers.

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Patent Owner(s)

Patent OwnerAddress
SILICON GENESIS CORPORATION61 DAGGETT DRIVE SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
CURRENT, Michael I San Jose, US 14 108
FONG, Theodore E Pleasanton, US 12 105

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