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United States of America Patent

APP PUB NO 20170302235A1
SERIAL NO

15463452

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Abstract

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An amplification circuit has a field effect transistor, an input side matching circuit, an output side matching circuit, a capacitor, and a resistor. The input side matching circuit is connected between an input port and the source terminal of the field effect transistor and outputs an input signal that changes with a bias voltage as a center value. The output side matching circuit is connected between an output port and the drain terminal of the field effect transistor. The capacitor is connected between the gate terminal of the field effect transistor and a first reference voltage source. The resistor is connected between the gate terminal of the field effect transistor and the first reference voltage source.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
FUJITSU LIMITEDKAWASAKI18361

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
SATO, MASARU Isehara, JP 128 1101

Cited Art Landscape

Patent Info (Count) # Cites Year
 
NEC CORPORATION (1)
* 6307436 Predistortion type linearizer with a resonant circuit and common gate FET 12 2000
 
SAMSUNG ELECTRO-MECHANICS CO., LTD. (1)
* 2011/0121,912 ASYMMETRIC POWER DIVIDER 2 2010
 
NORTHROP GRUMMAN SYSTEMS CORPORATION (1)
* 6657497 Asymmetric, voltage optimized, wideband common-gate bi-directional MMIC amplifier 6 2002
 
PACIFIC MONOLITHICS, INC. (1)
* 5015968 Feedback cascode amplifier 37 1990
* Cited By Examiner

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