Reception circuit for reducing current and electronic apparatus including the same
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United States of America Patent
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Jan 29, 2019
Grant Date -
Oct 26, 2017
app pub date -
Jul 13, 2017
filing date -
Oct 16, 2015
priority date (Note) -
In Force
status (Latency Note)
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Abstract
Provided is a reception circuit provided in a chip, the reception circuit including a controller that generates a reception control signal which is activated for a preset time on a basis of a first control signal individually provided to a plurality of chips, a buffer that receives a second control signal commonly provided to the plurality of chips, and a delay circuit that receives the second control signal from the buffer in response to the reception control signal and provides the second control signal to other elements in the chip.
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