Manufacturing method of patterned structure of semiconductor
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United States of America Patent
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Oct 2, 2018
Grant Date -
Oct 26, 2017
app pub date -
Jul 12, 2017
filing date -
Mar 31, 2015
priority date (Note) -
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status (Latency Note)
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Abstract
A method of fabricating a patterned structure of a semiconductor device includes the following steps: providing a substrate having a target layer thereon; forming a patterned sacrificial layer on the target layer, wherein the patterned sacrificial layer consists of a plurality of sacrificial features; forming spacers respectively on sidewalls of each of the sacrificial features, wherein all of the spacers are arranged to have a layout pattern; and transferring the layout pattern to the target layer so as to form a first feature and a second feature, wherein the first feature comprises a vertical segment and a horizontal segment, the second feature comprises a vertical segment and a horizontal segment, and a distance between the vertical segment of the first feature and the vertical segment of the second feature is less than a minimum feature size generated by an exposure apparatus.
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