Nanoscale interconnect array for stacked dies

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United States of America Patent

PATENT NO 10304803
APP PUB NO 20170323867A1
SERIAL NO

15147807

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Abstract

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A microelectronic assembly including an insulating layer having a plurality of nanoscale conductors disposed in a nanoscale pitch array therein and a pair of microelectronic elements is provided. The nanoscale conductors can form electrical interconnections between contacts of the microelectronic elements while the insulating layer can mechanically couple the microelectronic elements together.

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Patent Owner(s)

  • INVENSAS CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Haba, Belgacem Saratoga, US 716 20639
Lee, Bongsub Mountain View, US 19 362
Lee, Sangil Santa Clara, US 27 46
Wang, Liang Milpitas, US 567 4748

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