Vertically stacked semiconductor devices having vertical channel transistors

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United States of America Patent

PATENT NO 11018235
APP PUB NO 20170358586A1
SERIAL NO

15349904

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Abstract

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The disclosed technology generally relates to semiconductor devices, and more particularly to semiconductor devices having a stacked arrangement, and further relates to methods of fabricating such devices. In one aspect, a semiconductor device comprises a first memory device and a second memory device formed over a substrate and at least partly stacked in a vertical direction. Each of the first and second memory devices has a plurality of vertical transistors, wherein each vertical transistor has a vertical channel extending in the vertical direction.

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Patent Owner(s)

Patent OwnerAddress
IMEC VZWLEUVEN LEUVEN FLEMISH BRABANT
VRIJE UNIVERSITEIT BRUSSELPLEINLAAN 2 BRUSSEL B-1050

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Huynh, Bao Trong Elsene, BE 13 64
Ryckaert, Julien Tervuren, BE 45 327
Veloso, Anabela Leuven, BE 22 200

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