SEMICONDUCTOR DEVICE WITH STACKED LAYOUT
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United States of America Patent
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Nov 11, 2016
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Jun 13, 2016
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Abstract
The disclosed technology generally relates to semiconductor devices, and more particularly to semiconductor devices having a stacked arrangement, and further relates to methods of fabricating such devices. In one aspect, a semiconductor device comprises a first memory device and a second memory device formed over a substrate and at least partly stacked in a vertical direction. Each of the first and second memory devices has a plurality of vertical transistors, wherein each vertical transistor has a vertical channel extending in the vertical direction.
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