SYSTEM TO DUPLICATE NEUROMORPHIC CORE FUNCTIONALITY
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United States of America Patent
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Issued Date -
Dec 21, 2017
app pub date -
Jun 21, 2016
filing date -
Jun 21, 2016
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Abstract
A neuromorphic memory circuit including a memory cell with a programmable resistive memory element. A postsynaptic capacitor builds up a leaky integrate and fire (LIF) charge. An axon LIF pulse generator activates a LIF discharge path from the postsynaptic capacitor through the resistive memory element when the axon LIF pulse generator generates axon LIF pulses. A postsynaptic comparator compares the capacitor voltage to a threshold voltage and generates postsynaptic output pulses when the capacitor voltage passes the threshold voltage. The postsynaptic output pulses include a postsynaptic firing characteristic dependent on a frequency of the axon LIF pulses. A refractory circuit prevents the postsynaptic comparator from generating additional postsynaptic output pulses until a refractory time passes since a preceding postsynaptic output pulse. A training circuit adjusts the postsynaptic firing characteristic to match a target firing characteristic.
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Patent Owner(s)
Patent Owner | Address | |
---|---|---|
INTERNATIONAL BUSINESS MACHINES CORPORATION | NEW ORCHARD ROAD ARMONK NY 10504 |
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- [Patents Count]
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Kim, SangBum | Yorktown Heights, US | 339 | 2986 |
Lam, Chung H | Peekskill, US | 257 | 3520 |
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