APPARATUSES, METHODS, AND SYSTEMS FOR GRANULAR AND ADAPTIVE HARDWARE TRANSACTIONAL SYNCHRONIZATION

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United States of America Patent

SERIAL NO

15194226

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Abstract

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Methods and apparatuses relating to hardware transactions are described. In one embodiment, a processor includes one or more cores to concurrently execute a plurality of transactions, and a hardware transactional circuit to detect an occurrence of a software selected precursor in any of the plurality of transactions and abort at least one of the plurality of transactions on the occurrence unless an interface to software indicates the occurrence is to not cause an abort, wherein the occurrence is not a memory access of shared data by the plurality of transactions.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
DOSHI, KSHITIJ A Tempe, US 143 1026
HUGHES, CHRISTOPHER J Santa Clara, US 196 2166

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