METHOD AND APPARATUS FOR REDUCING DATA PROGRAM COMPLETION OVERHEAD IN NAND FLASH

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United States of America Patent

SERIAL NO

15195328

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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In one embodiment, an apparatus comprises a storage device comprising a NAND flash memory. The storage device is to receive a write request from a computing host, the write request to specify data to be written to the NAND flash memory; perform a number of program loops to program the data into a plurality of cells of the NAND flash memory, wherein a program loop comprises application of a program voltage to a wordline of the memory to change the threshold voltage of at least one cell of the plurality of cells; and wherein the number of program loops is to be determined prior to receipt of the write request and based on a distribution of threshold voltages of the cells or determined based on tracking a number of program errors for only a portion of the plurality of cells.

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Patent Owner(s)

Patent OwnerAddress
INTEL NDTM US LLC2200 MISSION COLLEGE BLVD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
D'alessandro, Andrea Avezzano, IT 31 72
Kalavade, Pranav San Jose, US 102 651
Moschiano, Violante Avezzano, IT 186 1383
Rajwade, Shantanu R Sunnyvale, US 31 106

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