Synchronous input / output hardware acknowledgement of write completions
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United States of America Patent
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Mar 12, 2019
Grant Date -
Dec 28, 2017
app pub date -
Jun 23, 2016
filing date -
Jun 23, 2016
priority date (Note) -
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Abstract
A computer-implemented method for computer-implemented method for communicating completion of synchronous input/output (I/O) commands between a processor executing an operating system and a recipient control unit is described. The method may include issuing, by a processor, a Synchronous I/O command to the recipient control unit; receiving, with the processor, a DMA read request from the recipient control unit; converting, with the processor, the DMA read response to write a data record into memory of the recipient control unit; issuing the DMA read request to the recipient control unit, wherein the DMA read request comprises an echo read portion comprising at least one byte of information at the end of the data record written; receiving, by the processor, a DMA write confirmation comprising the echo read portion of the record; and writing the echo read portion to a status area.
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