Apparatuses, methods, and systems for memory disambiguation

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United States of America Patent

PATENT NO 10067762
APP PUB NO 20180004522A1
SERIAL NO

15201218

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Apparatuses, methods, and systems relating to memory disambiguation are described. In one embodiment, a processor includes a decoder to decode an instruction into a decoded instruction, an execution unit to execute the decoded instruction, a retirement unit to retire an executed instruction in program order, and a memory disambiguation circuit to allocate an entry in a memory disambiguation table for a first load instruction that is to be flushed for a memory ordering violation, the entry comprising a counter value and an instruction pointer for the first load instruction.

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Patent Owner(s)

  • INTEL CORP.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Agarwal, Vikash Austin, US 15 18
Bryant, Christopher D Austin, US 21 314
Combs, Jonathan D Austin, US 24 158
Robinson, Stephen J Austin, US 18 134

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