Systems, apparatuses, and methods for snooping persistent memory store addresses
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United States of America Patent
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Apr 2, 2019
Grant Date -
Jan 4, 2018
app pub date -
Jul 2, 2016
filing date -
Jul 2, 2016
priority date (Note) -
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status (Latency Note)
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Abstract
Systems, methods, and apparatuses for executing an instruction are described. In some embodiments, a decoder circuit decodes an instruction, wherein the instruction to include at least an opcode, a field for source operand, and a field for a destination operand. Execution circuitry executes the decoded instruction to determine if a tag from the address from the source operand matches a tag in a selected non-volatile memory address cache (NVMAC) cache line, wherein when there is a match a hit indication is stored in the destination operand, and when there is not a match, a no hit indication is stored in the destination operand and the NVMAC is updated with the tag from the address from the source operand.
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