Reading circuit with a shifting stage and corresponding reading method

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United States of America Patent

PATENT NO 10127966
APP PUB NO 20180005684A1
SERIAL NO

15389751

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Abstract

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A reading circuit for a charge-retention circuit stage is provided with a storage capacitor coupled between a first biasing terminal and a floating node, and a discharge element coupled between the floating node and a reference terminal. The reading circuit further has an operational amplifier having a first input terminal that is coupled to the floating node and receives a reading voltage, a second input terminal receives a reference voltage, and an output terminal on which it supplies an output voltage, the value of which is a function of the comparison between the reading voltage and the reference voltage and indicative of a residual charge in the storage capacitor. A shifting stage shifts the value of the reading voltage of the floating node, before the comparison is made between the reading voltage and the reference voltage for supplying the output voltage.

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Patent Owner(s)

  • STMICROELECTRONICS (CROLLES 2) SAS; STMICROELECTRONICS (ROUSSET) SAS; STMICROELECTRONICS S.R.L

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bianchi, Raul Andres Myans, FR 20 86
Castaldo, Enrico Catania, IT 16 75
Conte, Antonino Tremestieri Etneo, IT 87 560
La, Rosa Francesco Rousset, FR 114 697

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