SUBSTRATE WITH SUB-INTERCONNECT LAYER

Number of patents in Portfolio can not be more than 2000

United States of America Patent

SERIAL NO

15201388

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

Electrical interconnect technology for a package substrate is disclosed. A substrate can include a first conductive element at least partially disposed in a first routing layer, and a second conductive element at least partially disposed in a second routing layer. The first and second routing layers are adjacent routing layers. The substrate can also include a third conductive element having first and second portions disposed in the first routing layer, and an intermediate third portion disposed in a “sub-interconnect layer” between the first and second routing layers.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Goh, Eng Huet Ayer Itam, MY 1 0
Lim, Min Suet Bayan Lepas, MY 121 433
Sir, Jiun Hann Gelugor, MY 48 177
Yong, Khang Choong Puchong, MY 60 115

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation