Energy-efficient bitcoin mining hardware accelerators

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United States of America Patent

PATENT NO 10313108
APP PUB NO 20180006807A1
SERIAL NO

15196686

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Abstract

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A processing system includes a processor to construct an input message comprising a target value and a nonce and a hardware accelerator, communicatively coupled to the processor, implementing a plurality of circuits to perform stage-1 secure hash algorithm (SHA) hash and stage-2 SHA hash, wherein to perform the stage-2 SHA hash, the hardware accelerator is to perform a plurality of rounds of compression on state data stored in a plurality of registers associated with a stage-2 SHA hash circuit using an input value, calculate a plurality of speculative computation bits using a plurality of bits of the state data, and transmit the plurality of speculative computation bits to the processor.

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Patent Owner(s)

  • INTEL CORP.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Mathew, Sanu K Hillsboro, US 105 973
Satpathy, Sudhir K Hillsboro, US 56 423
Suresh, Vikram B Hillsboro, US 35 199

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