MEMORY CONTROLLER

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United States of America Patent

SERIAL NO

15552337

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Abstract

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A memory controller that suppresses noise generated when data is transferred to a memory, includes a write part portion that writes transmission data into the memory, and a read portion that reads data from the memory. The write portion includes a substitution unit that substitutes, when a linear sequence of a bit of “1” and a bit of “0” of a bit string configuring data transmitted through the signal line is a target pattern set as a substitution target, a substitutional bit string that suppresses noise for the bit string, before the transmission data is written into the memory. The read portion includes a restoration unit that restores a substitutional bit string read from the memory to an initial bit string.

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Patent Owner(s)

Patent OwnerAddress
AISIN AW CO LTDANJO-SHI AICHI 444-1192

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
NARUSE, Takanobu Nishio, JP 31 159

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