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Abstract

A memory device includes a memory array storing data, a sense amplifier configured to read a plurality of data bits from the memory array and output a sense data signal including the data bits read from the memory array, a data multiplexer configured to receive the sense data signal and generate a plurality of group signals, a plurality of local data registers coupled to the data multiplexer, at least one of the local data registers being configured to generate a serial data output signal according to an output mode, and a plurality of output circuits coupled to respective ones of the plurality of local data registers, at least one of the output circuits being configured to receive the serial data output signal output from the at least one of the local data registers and sequentially output the data bits included in the serial data output signal.

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