Semiconductor device and method of manufacturing the semiconductor device

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United States of America Patent

PATENT NO 10249715
APP PUB NO 20180026099A1
SERIAL NO

15604848

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Abstract

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Properties of a semiconductor device are improved. A semiconductor device is configured so as to include a voltage clamp layer, a channel underlayer, a channel layer, and a barrier layer, which are formed in order above a substrate, a trench that extends up to the middle of the channel layer while penetrating through the barrier layer, a gate electrode disposed within the trench with a gate insulating film in between, a source electrode and a drain electrode formed above the barrier layer on both sides of the gate electrode, and a fourth electrode electrically coupled to the voltage clamp layer. The fourth electrode is electrically isolated from the source electrode, and a voltage applied to the fourth electrode is different from a voltage applied to the source electrode. Consequently, threshold control can be performed. For example, a threshold of a MISFET can be increased.

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Patent Owner(s)

  • RENESAS ELECTRONICS CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kawaguchi, Hiroshi Ibaraki, JP 258 3283
Miyamoto, Hironobu Ibaraki, JP 115 1972
Nakayama, Tatsuo Ibaraki, JP 90 1822
Okamoto, Yasuhiro Ibaraki, JP 208 3504
Tsuboi, Atsushi Ibaraki, JP 13 95

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