MEMORY MANAGING METHOD AND APPARATUS ASSOCIATED WITH CACHE IN IMAGE PROCESSING SYSTEM

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United States of America Patent

SERIAL NO

15428437

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Abstract

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A memory managing method for a cache including multiple storage regions is provided. Each of the storage regions includes multiple cache lines, and corresponds to multiple image blocks included in an original image frame. In response to a request for storing compressed data of an image block into the cache, a target storage region corresponding to the image block is selected from the multiple storage regions. A target applied sequence of the cache lines for the image block is determined. The compressed data of the image block is stored into the target storage region in a way that the compressed data of the image block is stored in the target storage region as conformed to the target applied sequence of the cache lines.

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Patent Owner(s)

Patent OwnerAddress
MSTAR SEMICONDUCTOR INC4F-1 NO 26 TAI-YUAN ST CHU PEI HSINCHU HSIEN 302

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lin, He-Yuan Zhubei City, TW 27 99

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