Memory cells, memory cell programming methods, memory cell reading methods, memory cell operating methods, and memory devices
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United States of America Patent
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Apr 16, 2019
Grant Date -
Mar 8, 2018
app pub date -
Oct 30, 2017
filing date -
Jan 15, 2008
priority date (Note) -
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Abstract
Embodiments disclosed include memory cell operating methods, memory cell programming methods, memory cell reading methods, memory cells, and memory devices. In one embodiment, a memory cell includes a wordline, a first bitline, a second bitline, and a memory element. The memory element is electrically connected to the wordline and selectively electrically connected to the first bitline and the second bitline. The memory element stores information via a resistive state of the memory element. The memory cell is configured to convey the resistive state of the memory element via either a first current flowing from the first bitline through the memory element to the wordline or a second current flowing from the wordline through the memory element to the second bitline.
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