Non-volatile semiconductor memory device
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United States of America Patent
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app pub date -
Sep 14, 2017
filing date -
Sep 15, 2016
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Abstract
A flash memory includes a memory array including a memory mat MAT-0, MAT-1; a page buffer 170-0, holding data read from the memory mat MAT-0; a page buffer 170-1, holding data read from the memory mat MAT-1; an ECC circuit 140, performing data error checking and correction; an output buffer 110 for outputting data; and a transferring control element, controlling transferring of data between the page buffer 170-0, page buffer 170-1, ECC circuit 140 and output buffer 110. When the memory mat MAT-0 is selected, the transferring control element transfers data held by the page buffer 170-0 to the page buffer 170-1 of the memory mat MAT-1.
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