Techniques providing metal gate devices with multiple barrier layers
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United States of America Patent
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Jun 4, 2019
Grant Date -
Mar 15, 2018
app pub date -
Nov 27, 2017
filing date -
Sep 1, 2011
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Abstract
A semiconductor device with a metal gate is disclosed. An exemplary semiconductor device with a metal gate includes a semiconductor substrate, source and drain features on the semiconductor substrate, a gate stack over the semiconductor substrate and disposed between the source and drain features. The gate stack includes a HK dielectric layer formed over the semiconductor substrate, a plurality of barrier layers of a metal compound formed on top of the HK dielectric layer, wherein each of the barrier layers has a different chemical composition; and a stack of metals gate layers deposited over the plurality of barrier layers.
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