Enable signal generation circuit
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United States of America Patent
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Jan 8, 2019
Grant Date -
Apr 5, 2018
app pub date -
Oct 2, 2017
filing date -
Oct 4, 2016
priority date (Note) -
In Force
status (Latency Note)
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Abstract
Disclosed herein is an enable signal generation circuit. The circuit includes: an enable input terminal that receives an enable input voltage; an enable detection circuit that determines whether the enable input voltage is higher than a first reference voltage, and then outputs an inverted signal; and an output section that is connected to the enable detection circuit. The enable detection circuit is formed of at least two transistors arranged in a differential configuration, gives the two transistors offset voltages that provide different operating voltages, and causes the output section to output a signal based on the inverted signal.
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