Opportunistic increase of ways in memory-side cache

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United States of America Patent

PATENT NO 10162758
APP PUB NO 20180165205A1
SERIAL NO

15373701

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Abstract

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A processor includes a processor core and a cache controller coupled to the processor core. The cache controller is to allocate, for a memory, a plurality of cache entries in a cache, wherein the processor core is to: detect an amount of the memory installed in a computing system and, responsive to detecting less than a maximum allowable amount of the memory for the computing system, direct the cache controller to increase a number of ways of the cache in which to allocate the plurality of cache entries.

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Patent Owner(s)

  • INTEL CORP.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Sasanka, Ruchira Hillsboro, US 21 253

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