Band specific interleaving mismatch compensation in RF ADCs

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United States of America Patent

PATENT NO 10250273
APP PUB NO 20180175873A1
SERIAL NO

15791538

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Abstract

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An integrated circuit chip includes an interleaved analog-to-digital converter (ADC) and an interleaving calibration circuit. The interleaved ADC includes a plurality of ADCs that are each configured to sample an analog signal. The interleaved ADC is configured to convert the analog signal into an interleaved analog-to-digital signal (IADC signal) that includes a plurality of spurious signals formed from mismatches between the plurality of ADCs. The interleaving calibration circuit is configured to receive the IADC signal from the interleaved ADC, generate a mismatch profile estimate corresponding to the plurality of spurious signals to generate one or more mismatch profile estimates, determine whether a first mismatch profile estimate is in a frequency band of interest, and, in response to a determination that the first mismatch profile estimate is in the frequency band of interest, generate a set of model parameters based on the first mismatch profile estimate.

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Patent Owner(s)

  • TEXAS INSTRUMENTS INCORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ramakrishnan, Sthanunathan Bengaluru, IN 44 344
Sriram, Chandrasekhar Chennai, IN 12 24
Tangudu, Jawaharlal Bengaluru, IN 71 525
Venkatraman, Sashidharan Hyderabad, IN 20 48

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