Three-dimensional memory device with through-stack contact via structures and method of making thereof
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United States of America Patent
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May 7, 2019
Grant Date -
Dec 6, 2018
app pub date -
Jun 1, 2017
filing date -
Jun 1, 2017
priority date (Note) -
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Abstract
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, an array of memory structures, conductive structures located between a substrate and the alternating stack, conductive via structures, including an upper portion that overlies and contacts a top surface of a respective one of the electrically conductive layers, and a lower portion that underlies and is adjoined to the upper portion, contacts a top surface of a respective one of the conductive structures, and is electrically insulated from the rest of the electrically conductive layers. Inner, outer and intermediate dielectric spacers laterally surround a respective one of the conductive via structures.
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