MEMORY DEVICE AND OPERATION METHOD THEREOF
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United States of America
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Jun 11, 2019
Grant Date -
Jun 13, 2019
app pub date -
Dec 12, 2017
filing date -
Dec 12, 2017
priority date (Note) -
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Abstract
A memory device is provided. The memory device includes: a memory array having a plurality of cells; a regulator, coupled to the memory, the regulator being configured to provide a bit line voltage to a selected cell of the memory array and to provide a bias voltage; and a controllable current source, coupled to the memory array, the controllable current source being configured to conduct a controllable current in the controllable current source until a cell current of the selected cell reaches a threshold.
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