Power Management Integrated Circuit with Bleed Circuit Control
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United States of America Patent
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Issued Date -
Sep 12, 2019
app pub date -
Apr 29, 2019
filing date -
Mar 12, 2018
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Abstract
A memory system having a non-volatile memory and a power management integrated circuit (PMIC) that has a voltage regulator to apply a voltage on the non-volatile memory during normal operations. During a shutdown process, the PMIC has a bleeder that is activated to reduce the voltage applied on the non-volatile memory to a level that is below a programmable threshold, before allowing the memory system to restart again. During the bleeding operation, a comparator of the PMIC compares the voltage applied to the non-volatile memory and the threshold to determine whether the shutdown process can be terminated for a restart.
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