ELECTRICAL ISOLATION IN PHOTONIC INTEGRATED CIRCUITS

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United States of America Patent

APP PUB NO 20190324300A1
SERIAL NO

16474977

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Abstract

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A method of providing electrical isolation between subsections in a waveguide structure for a photonic integrated device, the structure comprising a substrate, a buffer layer and a core layer, the buffer layer being located between the substrate and the core and comprising a dopant of a first type, the first type being either n-type or p- type, the method comprising the steps of prior to adding any layer to a side of the core layer opposite to the buffer layer: selecting at least one area to be an electrical isolation region, applying a dielectric mask to a surface of the core layer opposite to the buffer layer, with a window in the mask exposing an area of the surface corresponding to the selected electrical isolation region, implementing diffusion of a dopant of a second type, the second type being of opposite polarity to the first type, and allowing the dopant of the second type to penetrate to the substrate to form a blocking junction.

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Patent Owner(s)

Patent OwnerAddress
LUMENTUM TECHNOLOGY UK LIMITEDCASWELL TOWCESTER NORTHAMPTONSHIRE NN12 8EQ

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
JONES, Stephen Northamptonshire, GB 122 1559
WHITBREAD, Neil David Towcester Northamptonshire, GB 10 49

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