CONDUCTIVE CAP-BASED APPROACHES FOR CONDUCTIVE VIA FABRICATION AND STRUCTURES RESULTING THEREFROM

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United States of America

SERIAL NO

16347184

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Abstract

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Conductive cap-based approaches for conductive via fabrication is described. In an example, an integrated circuit structure includes a plurality of conductive lines in an ILD layer above a substrate. Each of the conductive lines is recessed relative to an uppermost surface of the ILD layer. A plurality of conductive caps is on corresponding ones of the plurality of conductive lines, in recess regions above each of the plurality of conductive lines. A hardmask layer is on the plurality of conductive caps and on the uppermost surface of the ILD layer. The hardmask layer includes a first hardmask component on and aligned with the plurality of conductive caps, and a second hardmask component on an aligned with regions of the uppermost surface of the ILD layer. A conductive via is in an opening in the hardmask layer and on a conductive cap of one of the plurality of conductive lines.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
BRAIN, Ruth A Portland, US 31 253
CHANDHOK, Manish Beaverton, US 96 453
GSTREIN, Florian Portland, US 82 981
HAN, Eungnak Portland, US 43 213
HOURANI, Rami Portland, US 67 212
NYHUS, Paul A Portland, US 45 547
TSANG, Chi-Hwa Beaverton, US 16 345
WALLACE, Charles H Portland, US 134 1003

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