ELECTROFORM VAPOR CHAMBER INTEGRATED THERMAL MODULE INTO PCB LAYOUT DESIGN
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United States of America
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Issued Date -
Jan 23, 2020
app pub date -
Jul 23, 2018
filing date -
Jul 23, 2018
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Abstract
Systems and methods are described, and one method includes storing a PCB dimension, a vapor chamber (VC) case configuration, a package height of a heat-generating (HG) device, a component data identifying a height of a component, and a layout configuration data indicating locations for the HG device and the component. Upon determining the component location is an interfering location, the VC case configuration data is updated to indicate an inner clearance perimeter for the VC case, surrounding the interfering location. Electroforming forms the VC, for thermal coupling to the HG device, having a VC case with rimless, seamless outer peripheral surfaces aligned and facing according to the VC case outer perimeter, and other rimless surfaces aligned and facing, relative to the clearance perimeter, to form a clearance.
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