SPLIT-GATE NON-VOLATILE MEMORY AND FABRICATION METHOD THEREOF

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20200027888A1
SERIAL NO

16199189

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Abstract

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A split-gate non-volatile memory and a fabrication method thereof. The method comprises the following steps: 1) forming a plurality of shallow trench isolation structures in a semiconductor substrate; 2) forming word lines on the semiconductor substrate; 3) forming a source and a drain in the semiconductor substrate, and forming a floating gate on a sidewall of the word line on a side close to the source, a portion of the floating gate that contacts with the word lines presents as a sharp tip; 4) removing part of the word lines by adopting an etching process such that the sharp tip of the top portion of the floating gate is higher than the word lines; 5) forming a tunneling dielectric layer and an erasing gate at the top portion of the floating gate; and 6) forming a conductive plug on the drain and forming metal bit lines on the conductive plug.

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Patent Owner(s)

  • NEXCHIP SEMICONDUCTOR CO., LTD

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
CHERN, GEENG-CHUAN Hefei City, CN 30 662

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