METHOD OF DOUBLE-SIDE POLISHING SEMICONDUCTOR WAFER

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20200039021A1
SERIAL NO

16341692

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Abstract

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Provided is a method of double-side polishing a semiconductor wafer, which can suppress variation in the polishing quality by providing for changes in the polishing environment during polishing. The method of double-side polishing of a semiconductor wafer includes: a step of predetermining a criterion function for determining polishing tendencies of double-side polishing; a first step of starting double-side polishing of the semiconductor wafer under initial polishing conditions; a second step of while performing double-side polishing on the semiconductor wafer under the initial polishing conditions, calculating a value of the criterion function using the apparatus log data in a predetermined period of polishing in the first step, and setting on the double-side polishing apparatus polishing conditions obtained by adjusting the initial polishing conditions based on the value of the criterion function; and a third step of performing double-side polishing of the semiconductor wafer under the adjusted polishing conditions.

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Patent Owner(s)

Patent OwnerAddress
SUMCO CORPORATION2-1 SHIBAURA 1-CHOME MINATO-KU TOKYO 105-8634

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
FUKUHARA, Fumiya Tokyo, JP 1 2
KUBOTA, Mami Tokyo, JP 4 2
MIURA, Tomonori Tokyo, JP 29 167

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