WAFER FLATNESS CONTROL USING BACKSIDE COMPENSATION STRUCTURE

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20200058486A1
SERIAL NO

16140463

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

Embodiments of semiconductor structures for wafer flatness control and methods for using and forming the same are disclosed. In an example, a model indicative of a flatness difference of a wafer between a first direction and a second direction is obtained. The flatness difference is associated with one of a plurality of fabrication stages of a plurality of semiconductor devices on a front side of the wafer. A compensation pattern is determined for reducing the flatness difference based on the model. At the one of the plurality of the fabrication stages, a compensation structure is formed on a backside opposite to the front side of the wafer based on the compensation pattern to reduce the flatness difference.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
YANGTZE MEMORY TECHNOLOGIES CO LTD18 GAOXIN 4TH ROAD EAST LAKE HIGH-TECH DEVELOPMENT ZONE WUHAN HUBEI

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dai, Xiaowang Wuhan, CN 19 78
He, Jialan Wuhan, CN 6 11
Hu, Yushi Wuhan, CN 88 562
Li, Zhaosong Wuhan, CN 15 39
Lu, Zhenyu Wuhan, CN 165 2906
Tao, Qian Wuhan, CN 100 808
Xia, Ji Wuhan, CN 37 279

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation