COUNTER READOUT CIRCUIT
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
May 28, 2020
app pub date -
Nov 21, 2019
filing date -
Nov 26, 2018
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
A counter readout circuit includes a plurality of counter registers and an output data computing unit. The plurality of counter registers, each includes a counter which counts per clock signal cycle. The output data computing unit includes a computing unit which adds, for output, the counter value of a counter register to the total clock count from a first timing to a second timing. The counter register is selected from the plurality of counter registers. The first timing is common to all of the plurality of counter registers. The second timing is a timing of selection of the selected counter register.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully