Dual-Port Semiconductor Memory and First In First Out (FIFO) Memory Having Electrically Floating Body Transistor
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United States of America Patent
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Oct 21, 2021
app pub date -
Jun 30, 2021
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Nov 16, 2010
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Multi-port semiconductor memory cells including a common floating body region configured to be charged to a level indicative of a memory state of the memory cell. The multi-port semiconductor memory cells include a plurality of gates and conductive regions interfacing with said floating body region. Arrays of memory cells and method of operating said memory arrays are disclosed for making a memory device.
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