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Abstract

A memory device includes a memory array, a multiply-accumulate (MAC) circuit and an encoder-decoder circuit. The MAC circuit performs a MAC operation on an encoded weight data stored in the memory array and an input data to generate a partial MAC result. An encoder of the encoder-decoder circuit is configured to encode m weight bits among n weight bits of weight data according to an encryption key to generate the encoded weight data, wherein m and n are positive integers, and m is less than n. A decoder of the encoder-decoder circuit is configured to detect an error in the partial MAC result according to the encryption key to generate a decoded partial MAC result.

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First Claim