CROSSBAR CIRCUITS UTILIZING CURRENT-MODE DIGITAL-TO-ANALOG CONVERTERS
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United States of America
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Issued Date -
Nov 14, 2024
app pub date -
May 12, 2023
filing date -
May 12, 2023
priority date (Note) -
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status (Latency Note)
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Abstract
The present disclosure relates to crossbar circuits utilizing resistive random-access memory (RRAM) devices. A crossbar circuit may include a plurality of word lines intersecting with a plurality of bit lines, and a plurality of cross-point devices. Each of the cross-point devices is connected to one of the word lines and one of the bit lines and includes a resistive random-access memory (RRAM) device. The crossbar circuit may further include one or more current digital-to-analog converters (IDACs) configured to perform digital-to-analog conversion. The IDACs are selectively connected to the word lines or the bit lines to provide programming signals to program the RRAM devices to predetermined conductance values. The IDACs may linearly control the compliance currents of the RRAM devices to program the RRAM devices to multiple linearly separated conductance values.
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