NANOSHEET TRANSISTOR

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20240413224A1
SERIAL NO

18397293

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Abstract

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Inner and outer spacers for nanosheet transistors are formed using techniques that improve junction uniformity. One nanosheet transistor device includes outer spacers and an interlevel dielectric layer liner made from the same material. A second nanosheet transistor device includes outer spacers, inner spacers and an interlevel dielectric layer liner that are all made from the same material.

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Patent Owner(s)

Patent OwnerAddress
ADEIA SEMICONDUCTOR SOLUTIONS LLC3025 ORCHARD PARKWAY SAN JOSE CA 95134

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cheng, Kangguo Schenectady, US 3099 32749
Li, Juntao Cohoes, US 613 3837
Wu, Heng Guilderland, US 232 882
Xu, Peng Guilderland, US 685 5136

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