Digitally Calibrated Programmable Clock Phase Generation Circuit

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20250030425A1
SERIAL NO

18909930

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

An integrated circuit that includes a generating circuit is described. During operation, the generating circuit may provide an edge clock having a target phase within a clock period of an input clock, where the generating circuit does not include a delay-locked loop (DLL). For example, the generating circuit may include a gated ring oscillator that provides a reference clock having a first fundamental frequency that is larger than a second fundamental frequency of the input clock. Note that the gated ring oscillator may be programmable to adjust the first fundamental frequency within a predefined range of values. Moreover, the generating circuit may include a control circuit that determines a reference count of a number of edges of the reference clock within a reference period of the reference clock.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
AYDEEKAY LLC32 JOURNEY SUITE 100 ALISO VIEJO CA 92656

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kim, Robert W Aliso Viejo, US 12 4

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation