INTERCONNECTIONS FOR 3D MEMORY
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United States of America
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Issued Date -
Mar 13, 2025
app pub date -
Aug 21, 2024
filing date -
Aug 21, 2024
priority date (Note) -
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status (Latency Note)
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Abstract
Apparatuses and methods for interconnections for 3D memory are provided. One example apparatus can include a stack of materials including a plurality of pairs of materials, each pair of materials including a conductive line formed over an insulation material. The stack of materials has a stair step structure formed at one edge extending in a first direction. Each stair step includes one of the pairs of materials. A first interconnection is coupled to the conductive line of a stair step, the first interconnection extending in a second direction substantially perpendicular to a first surface of the stair step.
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