FAILURE DETECTION CIRCUIT, SEMICONDUCTOR DEVICE AND FAILURE DETECTION METHOD

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United States of America Patent

APP PUB NO 20250102571A1
SERIAL NO

18773937

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Abstract

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A failure detection circuit is provided in the target circuit having a first circuit area for operating in synchronization with the first clock signal, a first detection circuit for outputting a first detection result obtained by transitioning the voltage level in synchronization with the first clock signal, the first clock signal a second detection circuit for outputting a second detection result obtained by transitioning the voltage level in synchronization with, and a first comparison circuit for outputting a first comparison result by comparing the first detection result and the second detection result. Accordingly, by the failure detection circuit, it is possible to detect the failure accurately.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS CORPORATION2-24 TOYOSU 3-CHOME KOTO-KU TOKYO 135-0061

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
HIRANO, Masaaki Tokyo, JP 133 963
KAWAKITA, Daisuke Tokyo, JP 2 5
MIYAGUCHI, Akira Tokyo, JP 4 48
SUZUKI, Shogo Tokyo, JP 171 1015

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