CIRCUIT CONVERSION METHOD, LATCH CIRCUIT, AND C-ELEMENT CIRCUIT

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United States of America Patent

APP PUB NO 20250102572A1
SERIAL NO

18728225

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A circuit conversion method according to an embodiment of the present disclosure includes: setting a processing target path in an asynchronous logic circuit; first processing for determining whether or not a glitch occurs in each of a plurality of logic cells in the processing target path; second processing for performing conversion processing, the conversion processing being for converting one or more logic cells in which a glitch is determined to occur in the first processing into one or more glitch suppression logic cells, the one or more glitch suppression logic cells that are configured to suppress glitches, and perform same logical operation as the one or more logic cells; and, third processing for determining whether or not a glitch occurs in a subsequent-stage circuit in the processing target path after the second processing.

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Patent Owner(s)

Patent OwnerAddress
SONY SEMICONDUCTOR SOLUTIONS CORPORATION4-14-1 ASAHI-CHO ATSUGI-SHI KANAGAWA 2430014 ?2430014

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kaba, Yuji Kanagawa, JP 1 0
Tanimoto, Tadaaki Kanagawa, JP 20 162

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