SRAM WITH TRACKING CIRCUITRY FOR REDUCING ACTIVE POWER
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United States of America Patent
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Issued Date -
Mar 27, 2025
app pub date -
Dec 10, 2024
filing date -
Dec 10, 2024
priority date (Note) -
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status (Latency Note)
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Abstract
A memory device including a first memory cell, a first tracking cell, a tracking bit line, a second tracking cell and a word line driver. The first memory cell is configured to receive a first word line signal. The first tracking cell is configured to emulate the first memory cell. The tracking bit line is configured to transmit a tracking bit line signal to the first tracking cell. The second tracking cell is configured to adjust the tracking bit line signal according to the first word line signal. The word line driver is configured to adjust the first word line signal according to the tracking bit line signal and a first distance between the second tracking cell and a common node on the tracking bit line.
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