ARRANGEMENT FOR A SEMICONDUCTOR ARRANGEMENT COMPRISING AT LEAST ONE PASSIVE COMPONENT AND A SUBSTRATE
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United States of America
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Apr 3, 2025
app pub date -
Nov 28, 2022
filing date -
Nov 28, 2022
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Abstract
An arrangement for a semiconductor arrangement includes a substrate including a dielectric material layer and a first metallization arranged on the dielectric material layer. A passive component is arranged completely in a cutout of the first metallization and bears directly on the dielectric material layer. The passive component is designed to include a first profile. The the first metallization includes a second profile in a region of contacting with the passive component, with the first and second profiles engaging with one another.
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