PROCESSING METHOD, ASYNCHRONOUS CIRCUIT, AND LOGIC CIRCUIT

Number of patents in Portfolio can not be more than 2000

United States of America

APP PUB NO 20250119145A1
SERIAL NO

18832009

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Abstract

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A processing method according to an embodiment of the present disclosure includes: causing a computer to perform first processing for identifying one or a plurality of flip-flop circuits each forming a self-feedback loop from among a plurality of flip-flop circuits in a synchronous circuit, deleting a feedback path in the self-feedback loop, identifying two or more flip-flop circuits forming strongly coupled components from among the one or plurality of flip-flop circuits, and replacing the two or more flip-flop circuits forming the strongly coupled components with one dummy flip-flop circuit; and causing the computer to perform second processing for identifying first one or more flip-flop circuits coupled to input side of a combinational circuit and second one or more flip-flop circuits coupled to output side of the combinational circuit.

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Patent Owner(s)

Patent OwnerAddress
SONY SEMICONDUCTOR SOLUTIONS CORPORATION4-14-1 ASAHI-CHO ATSUGI-SHI KANAGAWA 2430014 ?2430014

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Katou, Toshihiko Kanagawa, JP 2 23
Tanimoto, Tadaaki Kanagawa, JP 20 162

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