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Abstract

Systems and techniques for forward error correction decode processing power reduction are described herein. A capacity of a network slice is determined for a user network interface (UNI) based on a subset of forward error correction (FEC) codewords to be decoded by the media access control processor. A number of decoder cores is calculated to decode the capacity of the network slice. A utilization value is determined for a decoder core. A decoder utilization value is calculated for the decoder cores using the utilization value a number of decoding iterations. A non-decoding media access control processor utilization value is obtained for the network slice. A geometry is calculated for the media access control processor using the number of decoder cores, the decoder utilization value, and the non-decoding media access control processor utilization value. A media access control processor manufacturing specification data is generated based on the calculated geometry.

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First Claim