Time-shared, multi-phase memory system with error checking and data correcting
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United States of America Patent
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Nov 18, 1980
Issued Date -
N/A
app pub date -
May 31, 1977
filing date -
May 31, 1977
priority date (Note) -
Expired
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Abstract
A multi-phase, bit addressable, variable field memory system partitioned into a plurality of individually addressable memory stacks and employing time-shared accessing circuitry as well as time shared error detection and data correction means, whereby serial memory stack accessing along with serial error checking and correction are achieved without significantly increasing the overall memory accessing time over that obtained for parallel accessing.
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