Processing system with dual buses
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United States of America Patent
Stats
-
Jan 13, 1981
Grant Date -
N/A
app pub date -
Apr 2, 1979
filing date -
Apr 2, 1979
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A processing system is disclosed in which transfers between processors and memory are made on dual redundant buses. In a transfer, the transmitting unit sends the same information simultaneously on each of the buses. The receiving unit makes parity checks on each bus, and compares the information received on one bus with that received on the other bus. The receiving unit includes means for implementing a decision rule, based on these checks and comparison, to choose from which bus to take information, if either.
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