
US Patent No: 4,245,344
Number of patents in Portfolio can not be more than 2000
Processing system with dual buses
Stats
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Jan 13, 1981
Issued date -
Apr 2, 1979
filing date -
06/025,815
serial no -
Expired
status

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Abstract
A processing system is disclosed in which transfers between processors and memory are made on dual redundant buses. In a transfer, the transmitting unit sends the same information simultaneously on each of the buses. The receiving unit makes parity checks on each bus, and compares the information received on one bus with that received on the other bus. The receiving unit includes means for implementing a decision rule, based on these checks and comparison, to choose from which bus to take information, if either.
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First Claim
Related Publications
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
| Patent Owner | Address | Total Patents |
|---|---|---|
| ROCKWELL INTERNATIONAL CORPORATION | EL SEGUNDO, CA | 1998 |
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Richter, David L | Ponca City, OK | 4 | 185 |
Cited Art
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Patent Citation Ranking
Forward Cites
| Patent Info | (Count) | # Cites | Year |
|---|---|---|---|
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| 4,920,477 Virtual address table look aside buffer miss recovery method and apparatus | 45 | 1987 | |
| 4,916,704 Interface of non-fault tolerant components to fault tolerant system | 39 | 1987 | |
| 4,907,228 Dual-rail processor with error checking at single rail interfaces | 56 | 1987 | |
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| 5,289,589 Automated storage library having redundant SCSI bus system | 37 | 1990 | |
| 5,363,497 System for removing section of memory from first system and allocating to second system in a manner indiscernable to both operating systems | 32 | 1993 | |
| 5,369,749 Method and apparatus for the direct transfer of information between application programs running on distinct processors without utilizing the services of one or both operating systems | 42 | 1994 | |
| 5,388,215 Uncoupling a central processing unit from its associated hardware for interaction with data handling apparatus alien to the operating system controlling said unit and hardware | 46 | 1994 | |
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| 6,587,905 Dynamic data bus allocation | 26 | 2000 | |
| 7,796,527 Computer hardware fault administration | 1 | 2006 | |
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| 7,676,600 Network, storage appliance, and method for externalizing an internal I/O link between a server and a storage controller integrated within the storage appliance chassis | 2 | 2004 | |
| 7,661,014 Network storage appliance with integrated server and redundant storage controllers | 0 | 2004 | |
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| 7,334,064 Application server blade for embedded storage appliance | 8 | 2004 | |
| 7,330,999 Network storage appliance with integrated redundant servers and storage controllers | 6 | 2004 | |
| 7,320,083 Apparatus and method for storage controller to deterministically kill one of redundant servers integrated within the storage controller chassis | 10 | 2004 | |
| 7,278,054 Apparatus and method for deterministically performing active-active failover of redundant servers in response to a heartbeat link failure | 1 | 2004 | |
| 7,627,780 Apparatus and method for deterministically performing active-active failover of redundant servers in a network storage appliance | 1 | 2004 | |
| 7,401,254 Apparatus and method for a server deterministically killing a redundant server integrated within the same network storage appliance chassis | 13 | 2004 | |
| 7,565,566 Network storage appliance with an integrated switch | 3 | 2004 | |
| 7,464,205 Application server blade for embedded storage appliance | 1 | 2006 | |
| 7,464,214 Application server blade for embedded storage appliance | 2 | 2006 | |
| 7,437,604 Network storage appliance with integrated redundant servers and storage controllers | 1 | 2007 | |
| 8,185,777 Network storage appliance with integrated server and redundant storage controllers | 0 | 2009 | |
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| 4,486,826 Computer peripheral control apparatus | 112 | 1981 | |
| 4,453,215 Central processing apparatus for fault-tolerant computing | 149 | 1981 | |
| 4,597,084 Computer memory apparatus | 58 | 1985 | |
| 4,654,857 Digital data processor with high reliability | 146 | 1985 | |
| 4,750,177 Digital data processor apparatus with pipelined fault tolerant bus protocol | 78 | 1986 | |
| 4,939,643 Fault tolerant digital data processor with improved bus protocol | 16 | 1987 | |
| 4,931,922 Method and apparatus for monitoring peripheral device communications | 26 | 1987 | |
| 4,926,315 Digital data processor with fault tolerant peripheral bus communications | 18 | 1987 | |
| 4,866,604 Digital data processing apparatus with pipelined memory cycles | 35 | 1988 | |
| 4,974,144 Digital data processor with fault-tolerant peripheral interface | 21 | 1989 | |
| 4,974,150 Fault tolerant digital data processor with improved input/output controller | 23 | 1989 | |
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| 5,784,592 Computer system which includes a local expansion bus and a dedicated real-time bus for increased multimedia performance | 8 | 1995 | |
| 5,692,211 Computer system and method having a dedicated multimedia engine and including separate command and data paths | 65 | 1995 | |
| 5,682,484 System and method for transferring data streams simultaneously on multiple buses in a computer system | 44 | 1995 | |
| 5,805,840 Bus arbiter employing a transaction grading mechanism to dynamically vary arbitration priority | 11 | 1996 | |
| 5,802,330 Computer system including a plurality of real time peripheral devices having arbitration control feedback mechanisms | 11 | 1996 | |
| 5,898,892 Computer system with a data cache for providing real-time multimedia data to a multimedia engine | 19 | 1996 | |
| 5,740,387 Computer system having an expansion bus which includes normal and real time modes | 30 | 1996 | |
| 5,809,261 System and method for transferring data streams simultaneously on multiple buses in a computer system | 23 | 1997 | |
| 5,951,664 Computer system having a multimedia bus and including improved time slotting and bus allocation | 70 | 1997 | |
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| 6,820,213 Fault-tolerant computer system with voter delay buffer | 9 | 2000 | |
| 6,735,715 System and method for operating a SCSI bus with redundant SCSI adaptors | 10 | 2000 | |
| 6,708,283 System and method for operating a system with redundant peripheral bus controllers | 35 | 2000 | |
| 6,691,257 Fault-tolerant maintenance bus protocol and method for using the same | 6 | 2000 | |
| 6,633,996 Fault-tolerant maintenance bus architecture | 8 | 2000 | |
| 6,766,479 Apparatus and methods for identifying bus protocol violations | 4 | 2001 | |
| 7,065,672 Apparatus and methods for fault-tolerant computing using a switching fabric | 22 | 2001 | |
| 6,996,750 Methods and apparatus for computer bus error termination | 8 | 2001 | |
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| 5,778,200 Bus arbiter including aging factor counters to dynamically vary arbitration priority | 26 | 1995 | |
| 5,748,921 Computer system including a plurality of multimedia devices each having a high-speed memory data channel for accessing system memory | 25 | 1995 | |
| 5,761,452 Bus arbiter method and system | 21 | 1996 | |
| 5,754,801 Computer system having a multimedia bus and comprising a centralized I/O processor which performs intelligent data transfers | 31 | 1996 | |
| 5,905,879 System and method for transferring periodic data streams on a multimedia bus | 19 | 1997 | |
| 5,870,622 Computer system and method for transferring commands and data to a dedicated multimedia engine | 44 | 1997 | |
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| 5,897,656 System and method for maintaining memory coherency in a computer system having multiple system buses | 33 | 1996 | |
| 6,622,214 System and method for maintaining memory coherency in a computer system having multiple system buses | 16 | 1999 | |
| 6,049,847 System and method for maintaining memory coherency in a computer system having multiple system buses | 34 | 1999 | |
| 6,701,469 Detecting and handling bus errors in a computer system | 15 | 1999 | |
| 6,636,939 Method and apparatus for processor bypass path to system memory | 8 | 2000 | |
| 6,654,845 System and method implementing a secondary bus to avoid read data latency | 3 | 2000 | |
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| 4,710,935 Parity detection system for wide bus circuitry | 11 | 1986 | |
| 5,442,754 Receiving control logic system for dual bus network | 9 | 1992 | |
| 5,511,224 Configurable network using dual system busses with common protocol compatible for store-through and non-store-through cache memories | 55 | 1995 | |
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| 4,472,712 Multipoint data communication system with local arbitration | 21 | 1982 | |
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| 6,505,321 Fault tolerant parity generation | 4 | 1999 | |
| 7,010,740 Data storage system having no-operation command | 0 | 2001 | |
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| 5,345,566 Method and apparatus for controlling dual bus system | 56 | 1992 | |
| 5,640,508 Fault detecting apparatus for a microprocessor system | 20 | 1994 | |
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| 5,404,465 Method and apparatus for monitoring and switching over to a back-up bus in a redundant trainline monitor system | 18 | 1993 | |
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| 7,245,667 Method of transmitting data | 0 | 2001 | |
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| 4,837,739 Telemetry data processor | 16 | 1986 | |
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| 6,598,106 Dual-port SCSI sub-system with fail-over capabilities | 21 | 1999 | |
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| 5,412,313 Method to reduce test vectors/test time in devices using equivalent blocks | 2 | 1992 | |
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| 4,628,512 Address distribution in data storage apparatus | 1 | 1985 | |
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| 6,687,851 Method and system for upgrading fault-tolerant systems | 22 | 2000 | |
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| 6,948,010 Method and apparatus for efficiently moving portions of a memory block | 19 | 2000 | |
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| 4,862,465 Dual-rail processors with error checking on I/O reads | 1987 | ||
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|
| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |