Digital data processing system with interface adaptor having programmable, monitorable control register therein
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United States of America Patent
Stats
-
Apr 21, 1981
Grant Date -
N/A
app pub date -
Jan 30, 1979
filing date -
Oct 30, 1974
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A digital system including a plurality of metal-oxide-semiconductor (MOS) chip random access memories (RAM), read only memories (ROM) and peripheral interface adaptors coupled to a common bidirectional data bus which is coupled to and controlled by a microprocessor unit (MPU). Each peripheral interface adaptor includes a control register loadable under program control. The contents of the control register control selection of several registers within the interface adaptor. The control register also controls other functions of the peripheral interface adaptor, including determining direction of data movement at the peripheral buffers of the interface adaptor. The contents of the control register of each interface adaptor are monitorable by the microprocessor unit.
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